وظيفة شاغرة في مجال هندسة الحاسوب

آخر موعد للتقديم هو 25.11.2017.

ASAL Technologies is the largest software R&D house in Palestine based in Rawabi City
We are looking for a Design Verification Engineers to join our team and help take it forward to the next level.
We are offering a very competitive Employee Benefits Packages that includes competitive salary and a great environment that will enable our talents to grow personally and professionally, and also give them the chance to work with multinational and well known global companies.
Description:
-Introducing the concepts of VLSI Verification with emphasis on functional Verification flows and methodologies.
-Coding in Specman and SystemVerilog languages which are the most popular Hardware Description Languages used in design verification.
-Writing test plan and procedure for the verification.
-Writing and implementing design using Verilog HDL and VHDL.
-Simulating and verifying design functionality using Specman/SystemVerilog simulators and waveform viewer.
Job Requirements:
-B.Sc. in computer engineering or any related field (for those who have strong programming skills).
-Fresh Gradates are encouraged to apply (besides those who are expected to be graduated during the current semester).
-Knowledge of data structure and Object Oriented Programming (OOP) is a MUST.
-Knowledge of Digital/Analog circuits.
-Knowledge of Verilog HDL or VHDL.
-Knowledge in integration, debugging, Verification environments and test plan development is a plus.
-Knowledge of functional verification is a plus.
-Knowledge of system level, chip level, and Block level verification and test bench development is a plus.
Interested candidates can apply their CV through ASAL Technologies website using 
the following link:
https://www.asaltech.com/careers/?details&id=212

2017-10-31 || 11:30

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وظيفة شاغرة في مجال هندسة الحاسوب

آخر موعد للتقديم هو 25.11.2017.

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وين أروح بنابلس؟

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